A memory may include a plurality of static random access memory (SRAM) cells arranged in columns and rows. Each SRAM cell may store a bit of data. To read a value stored in a cell or write a value into a cell, a column including the cell may be selected, and thereafter, a row including the cell may be selected.
An SRAM cell of a conventional memory may include transistors employed to store a value in the cell. The transistors may also be employed to affect a state of a signal coupled to the cell when a column that includes the cell is selected, such as for a read operation (e.g., the transistors may pull down the signal from a high logic state to a low logic state). However, employing such transistors to affect the state of the signal may cause the value stored in the cell to inadvertently change state (e.g., to be disturbed).
To read or write to a cell included in the conventional memory, a column of cells are selected, and thereafter, a row including the cell to be read or written is selected. However, because respective rows of remaining cells in the column are not selected, such remaining cells undergo stress which may cause respective values stored in such cells to inadvertently change state.
Accordingly, improved methods and apparatus are desired for accessing such a memory.